XCENA's Chip Revolutionizes AI Infrastructure

XCENA, a startup with operations in South Korea and the U.S., is pioneering a new chip architecture designed to reduce the significant costs and power consumption associated with AI infrastructure. The company's innovative approach involves placing compute capabilities much closer to DRAM, the fast-term memory chips that store actively used data. This proximity allows routine data operations to be handled near memory, eliminating the need for expensive and power-intensive round trips between CPUs, GPUs, and memory modules.

The potential for substantial savings in AI infrastructure costs has driven considerable investor enthusiasm. XCENA recently announced a $135 million Series B funding round, valuing the company at $570 million and bringing its total funding to $185 million. The company's CEO, Jin Kim, a veteran of memory giants Samsung and SK Hynix, stated that while CPUs and GPUs have evolved, memory has not, and XCENA aims to change this by creating memory-centric architectures.

XCENA's prototype chip, the MX1, connects to CPUs via Compute Express Link (CXL) and processes data directly within memory modules. This approach is intended to handle tasks like preprocessing and KV cache management, which traditionally rely on CPUs. The company claims its technology could reduce the server count for certain operations from ten down to one.

Mass production of the MX1 chips is scheduled to begin at Samsung's foundry lines by the end of 2026, with revenue generation expected to start in 2027. XCENA is targeting hyperscalers that incur significant annual spending on AI infrastructure, where even marginal memory efficiency gains can translate into hundreds of millions of dollars in savings. The company's closest competitors include Astera Labs and Marvell, though XCENA differentiates itself with its vertically integrated design and thousands of small, efficient RISC-V cores.