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Huawei's Chip Design Disrupts AI Race
27 May
Summary
- Huawei proposes 'Tau Scaling Law' to improve chip efficiency.
- New 'LogicFolding' tech stacks computing blocks instead of shrinking transistors.
- US trade restrictions push China towards chip design innovation.

The global demand for computing power, driven by the artificial intelligence boom, has led major tech firms to invest heavily in data centers and advanced chips. However, China faces challenges in this race due to US trade restrictions impacting its access to critical chipmaking technology.
In response, Huawei Technologies has introduced a novel chip design concept known as the 'Tau Scaling Law.' This approach deviates from the traditional focus on shrinking transistors, instead emphasizing improvements by reducing the distance data travels within a processor. The core of this innovation is 'LogicFolding,' a technique that stacks computing blocks vertically, enabling quicker information transfer.
This architectural redesign faces engineering hurdles, including manufacturing complexity and heat management. Despite these challenges, Huawei plans to integrate LogicFolding technology into smartphones later this year. The strategy aims to circumvent US export curbs, which currently limit Huawei to producing chips at a 7-nanometer geometry due to restricted access to extreme ultraviolet lithography.
If successful, LogicFolding could enable Huawei to achieve performance comparable to 1.4nm chips by 2031, significantly narrowing the technological gap with competitors. This development is viewed as a strategic move to maintain competitiveness in the crucial AI and semiconductor sectors amidst geopolitical tensions.